I'll see about getting some print screens out from it in a mo.
The UI is made from a 5x5 grid of levers, directly connected to an adjacent image preview screen. When mem write for a cache is triggered a 2 tick pulse is generated by each pixel then delayed by 2/4/6/8/10 ticks to produce a 5 bit modulated signal(one for each row). The decoder at the other end uses the same idea but with a staggered delay on the time line(synced to the first pulse by a signal request state circuit) instead of the data.
____________Modulated Signal
I I I I I
I I I I /
I I I //
I I /// <-Staggered repeaters
I ////
/////
&&&&&-<-<-<-<-<-<-<-Pulse into & gate grid
l l l l l <- Lever Grid
Each signal can be stored easily using a bit of wire and 7/8 repeaters, can stick an & and NOT gate into the circuit to act as a clear function.
I have no idea if anyone else uses similar designs, I came up with the concept as an extension of an old telegraph design I had last year.